Field of the Invention
The present invention relates to a method of forming a through wiring (through electrode) passing through a substrate, such as a semiconductor substrate, in the thickness direction. A substrate having this through wiring can be used to manufacture a capacitive transducer to be used as an ultrasonic transducer.
Description of the Related Art
As represented by an LSI, there is a need for a system of an integrated circuit and the like to have higher speed and higher functionality. In order to increase the speed and functionality of such an integrated circuit system, chip mounting technology using a three-dimensional structure is needed. Therefore, in the related art, a substrate through electrode capable of electrically connecting chips at a minimum distance has been used. The through electrode is formed by forming a through hole passing through the substrate, then filling the interior of the through hole with metal, and electrically connecting a substrate with the substrates stacked above and below that substrate via the metal. A common method for filling the metal into the interior of the through hole is electrolytic plating. When the through hole has a high aspect ratio, bottom-up electrolytic plating, in which a seed layer is formed on one end of the through hole, is effective in order to obtain a highly reliable through electrode. In Japanese Patent Application Laid-Open No. 2012-28533, there is disclosed a method for facilitating formation and removal of a seed layer. In this method, an insulating film and a conductive member are formed in order on one surface of a substrate, and then a through hole is formed from the opposite surface of the substrate using the conductive member as an etch stop layer. After formation of the through hole, a through electrode is formed by bottom-up electrolytic plating on the through hole using the conductive member as a seed layer.
However, in the method disclosed in Japanese Patent Application Laid-Open No. 2012-28533, the formation method and the formation conditions of the insulating film may be limited due to the insulating film being formed on an inner wall of the through hole in a state in which the seed layer is present. For example, when the temperature of the substrate is increased during formation of the insulating film on the inner wall of the through hole, the material of the seed layer may diffuse into the insulating film adhered to the seed layer, causing the properties of the insulating film to deteriorate. Further, depending on the formation conditions of the insulating film, the material of the seed layer can pass through the insulating film, and diffuse into an inner portion of the substrate. Accordingly, the insulating film on the inner wall of the through hole is formed at a low temperature in many cases. On the other hand, at a low temperature, it is difficult to form a high-quality insulating film, such as a silicon thermal oxidation film. In addition, in the method disclosed in Japanese Patent Application Laid-Open No. 2012-28533, during etching carried out to expose the seed layer at a bottom portion of the through hole, the insulating film on the inner wall, which is formed of the same material as the etching target, suffers damage, which can cause insulating properties to deteriorate.